How do you keep memory map information consistent across RTL, verification, firmware, and documentation teams? In this short video, Rich Weber, walks you through Magillem Registers, our product that brings every stakeholder onto a single, coherent source of truth for Hardware Software Interface. He explains how teams can capture address maps and behaviors in familiar formats (IP-XACT, SystemRDL, spreadsheets) or in CSRSpec™ language, import third-party IP, and automatically generate all the outputs the organization relies on: RTL, UVM RAL, driver header files, customer documentation, and more. Watch the video to learn more ⤵️ #MagillemRegisters #Arteris #semiconductors #innovation
About us
Arteris (Nasdaq: AIP) Arteris is a global leader in system IP used in semiconductors to accelerate the creation of high-performance, power-efficient silicon. Arteris network-on-chip (NoC) interconnect IP and system-on-chip (SoC) integration automation software are used by the world’s top semiconductor and technology companies to improve overall performance, engineering productivity, reduce risk, lower costs, and bring complex designs to market faster. Learn more at arteris.com.
- Website
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https://www.arteris.com
External link for Arteris
- Industry
- Semiconductor Manufacturing
- Company size
- 201-500 employees
- Headquarters
- Campbell, CA
- Type
- Public Company
- Founded
- 2004
- Specialties
- SoC Interconnect, semiconductor ip, noc interconnect, semiconductor intellectual property, ISO 26262, Network on Chip (NoC), SoC Integration Automation, Automotive, Artificial Intelligence, Machine Learning, 5G Communication, Networking, Servers, IoT, Enterprise Computing, Industrial, Consumer Electronics, System IP, and Innovation
Locations
Employees at Arteris
Updates
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Compute without congestion is the next frontier of AI system design 💪 Join our very own Andy Nightingale, VP of Product Management & Marketing at Arteris, at AI Everywhere 2025 by EE Times | Electronic Engineering Times for his session: 🔸“Compute Without Congestion: Architecting Scalable AI Systems from Cloud to Edge” 🗓️ December 11, 12:55–1:15 PM PST Andy will explore how to overcome the data movement bottleneck through modular chiplets, physically aware connectivity, and AI-driven automation. He will share insights from leading AI-compute and automotive programs on how smarter interconnect design enables scalability from data center to edge. Register now to attend live or get access to the recording: https://lnkd.in/dZAfzjPm #Arteris #AIEverywhere #EETimes #datacenter #AI
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📰 News Alert: Arteris Selected by Black Sesame Technologies Inc for Next Generation of Intelligent Driving Silicon In 2019, Black Sesame Technologies first licensed Arteris technology to push the boundaries of intelligent vehicle innovation, and we are proud to continue to support them as they advance the next generation of autonomous driving SoCs with our Ncore 3 and FlexNoC 5 interconnect IPs. David Zeng, Chief Systems Officer at Black Sesame Technologies shared 🎤: “As we continue to advance our designs, we have licensed FlexNoC 5 and Ncore 3 NoC IPs to achieve greater performance with an accelerated time to market to address the advancing needs of autonomous driving.” Learn more in the press release: https://hubs.ly/Q03W6dDj0 #Arteris #BlackSesame #FlexNoC #Ncore #innovation #semiconductors #Automotive #SoC
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Learn how industry leaders are rethinking data movement for next-gen AI chips during our webinar with Aion Silicon and SemiWiki.com happening tomorrow (December 2) already 🔔 Registration link is below ⤵️
AI workloads are transforming SoC design calling for faster data movement, lower latency, and higher energy efficiency. Join Andy Nightingale, VP of Product Management and Marketing at Arteris, and Piyush Singh, Principal Digital SoC Architect at Aion Silicon, for the upcoming webinar hosted by SemiWiki.com to explore how NoC architectures enable scalable, power-aware AI systems. 📅 Tuesday, December 2, 2025 🕐 10:00-11:00 AM PST Top 3 reasons to attend: 1️⃣ Learn how AI workload characteristics shape SoC topology and communication strategy. 2️⃣ Discover key tradeoffs between scalability, bandwidth, and power, including approaches for multi-die integration and memory coherence. 3️⃣ Gain practical insights into performance simulation, KPI-driven analysis, and NoC partitioning for timing closure. Register now to reserve your spot: https://lnkd.in/dMPKHg-2 #Arteris #AionSilicon #NoC #AI #FlexGen
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Bringing AI to the edge requires a balance of performance, efficiency, and reliability and that’s exactly what Axelera AI is achieving with the help of Arteris technology ✅ In our latest customer spotlight, Andrew Bond, Director of Silicon Verification at Axelera AI, shares how the company is redefining computer vision and low-power inference with purpose-built hardware. He also explains how collaboration with Arteris helped ensure efficient data movement and meet demanding latency and bandwidth goals. 🎤 “We knew we could trust the underlying technology to give us what we needed and we had a reliable partner to help us get there.” Watch the full interview to learn more ⤵️ #Arteris #AxeleraAI #AI #EdgeComputing #semiconductors #SoC #NoC
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Arteris reposted this
Delighted to announce our partnership with Arteris to streamline SoC development. More here: https://lnkd.in/eMnpCcWR
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We’re pleased to share that Rocco Jonack, Principal Corporate Application Engineer at Arteris, will be speaking at this year’s SystemC AMS & COSEDA Technologies GmbH User Group Meeting. 🎤 Rocco's Talk: TLM Model Usage for Analysis of Data Transport in Complex SoC Structures 🕗 When: December 3, 08:05–08:30 AM PST 💻 Where: Online Join Rocco and other experts to explore advanced methods for modeling, simulation, and analysis across analog, digital, hardware, and software domains — and to exchange insights with the SystemC AMS and COSIDE® community. 📩 Participation is free, but early registration is highly recommended. Email usergroupmeeting@coseda-tech.com to reserve your spot. Please also note that no recordings will be available, so be sure to attend live. #Arteris #COSEDA #SoC #semiconductors #innovation
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Arteris reposted this
Always a pleasure to share perspectives on semiconductor industry, leadership, and what's next. Thanks you Korean American Semiconductor Professional Alliance (KASPA) and Jae H Park for the opportunity!
📢 KASPA’s Leadership Interview Series – Now Live! The Korean American Semiconductor Professional Alliance (KASPA) is excited to launch our in-depth conversations with leaders from industry and academia who are shaping the future of semiconductors. This series showcases their expertise and experiences, exploring emerging technologies, industry trends, innovation strategies, sustainability, leadership development, and the expanding role of AI in semiconductor design and manufacturing. Discover the series on our website https://lnkd.in/g2FnPtx4. We thank all the leaders who contributed their insights and experiences to this series, and we look forward to sharing more thought leadership as it continues to grow. #Semiconductor #SemiconductorIndustry #SemiconductorLeaders #AI #ArtificialIntelligence #Leadership #TechLeadership #Innovation #Technology #KASPA Lars Reger Eric Demers Jang-Kwon Lim Michal Siwinski Ahmad Ashrafzadeh Robert Quinn Mark Lundstrom Oreste Donzella
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Dreaming of your next big career move? At Arteris, you will join a global team shaping the future of semiconductor IP powering devices people rely on every day. If you’re excited about: 🔸 innovating at the heart of chip design 🔸 collaborating with experts across borders 🔸 and seeing your work make real-world impact …then your next opportunity might be right here. Explore open roles👉 https://hubs.ly/Q03Hy6sG0 #Arteris #hiring #engineering #semiconductors #careers #France #Poland #USA #Asia
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Meet our team at Design And Reuse IP-SoC 2025 in Grenoble, France! D&R's IP-SoC is a series of industry’s annual gatherings for IP providers, consumers, and innovators. It is a place to explore the latest technology trends and shape the future of IP and SoC design. Rick Bye will take the stage on December 3 at 10:40-11:00 AM with the talk "Network-on-Chip (NoC) automation simplifies reuse in derivative System-on-Chip (SoC) design". Learn how smart NoC IP with full and incremental automation can streamline derivative SoC development, reduce time to market, and deliver better design outcomes. 👉 Register for the event here: https://lnkd.in/gDukw7qe 🤝 Book a meeting with Rick here: https://lnkd.in/gzzYurXY #Arteris #semiconductors #NoC #innovation
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