| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Sort the remaining #include lines in include/... and lib/.... | Chandler Carruth | 2017-06-06 | 1 | -1/+1 |
| * | CodeGen: Rename DEBUG_TYPE to match passnames | Matthias Braun | 2017-05-25 | 1 | -4/+4 |
| * | MachineCSE: Respect interblock physreg liveness | Mikael Holmen | 2017-05-24 | 1 | -2/+2 |
| * | [codegen] Add generic functions to skip debug values. | Florian Hahn | 2016-12-16 | 1 | -2/+1 |
| * | MachineRegisterInfo: Remove unused arg from isConstantPhysReg(); NFC | Matthias Braun | 2016-10-28 | 1 | -1/+1 |
| * | [CodeGen] Rename MachineInstr::isInvariantLoad to isDereferenceableInvariantL... | Justin Lebar | 2016-09-10 | 1 | -1/+1 |
| * | CodeGen: Use MachineInstr& in TargetInstrInfo, NFC | Duncan P. N. Exon Smith | 2016-06-30 | 1 | -4/+3 |
| * | Re-commit optimization bisect support (r267022) without new pass manager supp... | Andrew Kaylor | 2016-04-22 | 1 | -1/+1 |
| * | Revert "Initial implementation of optimization bisect support." | Vedant Kumar | 2016-04-22 | 1 | -1/+1 |
| * | Initial implementation of optimization bisect support. | Andrew Kaylor | 2016-04-21 | 1 | -1/+1 |
| * | [SSP, 2/2] Create llvm.stackguard() intrinsic and lower it to LOAD_STACK_GUARD | Tim Shen | 2016-04-19 | 1 | -0/+6 |
| * | rangify; NFCI | Sanjay Patel | 2016-01-06 | 1 | -24/+14 |
| * | [PM/AA] Rebuild LLVM's alias analysis infrastructure in a way compatible | Chandler Carruth | 2015-09-09 | 1 | -3/+3 |
| * | MachineCSE: Add a target query for the LookAheadLimit heurisitic | Tom Stellard | 2015-05-09 | 1 | -2/+3 |
| * | Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. | Benjamin Kramer | 2015-03-23 | 1 | -0/+1 |
| * | MachineCSE: Clear dead-def flag on CSE. | Matthias Braun | 2015-02-04 | 1 | -2/+9 |
| * | [MachineCSE] Clear kill-flag on registers imp-def'd by the CSE'd instruction. | Ahmed Bougacha | 2014-12-02 | 1 | -0/+31 |
| * | In Machine CSE pass, the source register of a COPY machine instruction can | Jiangning Liu | 2014-08-11 | 1 | -11/+19 |
| * | Have MachineFunction cache a pointer to the subtarget to make lookups | Eric Christopher | 2014-08-05 | 1 | -2/+2 |
| * | Remove the TargetMachine forwards for TargetSubtargetInfo based | Eric Christopher | 2014-08-04 | 1 | -2/+3 |
| * | Add TargetInstrInfo interface isAsCheapAsAMove. | Jiangning Liu | 2014-07-29 | 1 | -1/+1 |
| * | [Modules] Remove potential ODR violations by sinking the DEBUG_TYPE | Chandler Carruth | 2014-04-22 | 1 | -1/+2 |
| * | Disable each MachineFunctionPass for 'optnone' functions, unless that | Paul Robinson | 2014-03-31 | 1 | -0/+3 |
| * | Switch a number of loops in lib/CodeGen over to range-based for-loops, now that | Owen Anderson | 2014-03-17 | 1 | -17/+9 |
| * | Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing | Owen Anderson | 2014-03-13 | 1 | -17/+17 |
| * | [C++11] Add 'override' keyword to virtual methods that override their base cl... | Craig Topper | 2014-03-07 | 1 | -3/+3 |
| * | Replace PROLOG_LABEL with a new CFI_INSTRUCTION. | Rafael Espindola | 2014-03-07 | 1 | -2/+2 |
| * | [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. | Benjamin Kramer | 2014-03-02 | 1 | -2/+2 |
| * | Disabled subregister copy coalescing during MachineCSE. | Andrew Trick | 2013-12-17 | 1 | -5/+15 |
| * | Allow MachineCSE to coalesce trivial subregister copies the same way that it ... | Andrew Trick | 2013-12-17 | 1 | -3/+8 |
| * | Revert "Allow MachineCSE to coalesce trivial subregister copies the same way ... | Rafael Espindola | 2013-12-16 | 1 | -8/+3 |
| * | Allow MachineCSE to coalesce trivial subregister copies the same way | Andrew Trick | 2013-12-16 | 1 | -3/+8 |
| * | whitespace | Andrew Trick | 2013-12-16 | 1 | -1/+1 |
| * | Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector s... | Craig Topper | 2013-07-14 | 1 | -4/+4 |
| * | Use the new script to sort the includes of every file under lib. | Chandler Carruth | 2012-12-03 | 1 | -5/+5 |
| * | CSE: allow PerformTrivialCoalescing to check copies across basic block | Manman Ren | 2012-11-27 | 1 | -2/+0 |
| * | Don't use iterator after being erased. | Jakub Staszak | 2012-11-26 | 1 | -1/+1 |
| * | Do not consider a machine instruction that uses and defines the same | Ulrich Weigand | 2012-11-13 | 1 | -16/+44 |
| * | Remove unused BitVectors from getAllocatableSet(). | Jakob Stoklund Olesen | 2012-10-16 | 1 | -3/+0 |
| * | Switch most getReservedRegs() clients to the MRI equivalent. | Jakob Stoklund Olesen | 2012-10-15 | 1 | -4/+1 |
| * | MachineCSE: Hoist isConstantPhysReg out of the loop, it checks for overlaps a... | Benjamin Kramer | 2012-08-11 | 1 | -4/+3 |
| * | PR13578: Teach MachineCSE that instructions that use a constant register can ... | Benjamin Kramer | 2012-08-11 | 1 | -2/+5 |
| * | X86: enable CSE between CMP and SUB | Manman Ren | 2012-08-08 | 1 | -2/+18 |
| * | MachineCSE: Update the heuristics for isProfitableToCSE. | Manman Ren | 2012-08-07 | 1 | -0/+23 |
| * | Remove tabs. | Bill Wendling | 2012-07-19 | 1 | -1/+1 |
| * | Remove ParentMap. You can just ask the domnode for its parent. No functionality | Nick Lewycky | 2012-07-05 | 1 | -11/+8 |
| * | Switch some getAliasSet clients to MCRegAliasIterator. | Jakob Stoklund Olesen | 2012-06-01 | 1 | -3/+2 |
| * | Use uint16_t to store register overlaps to reduce static data. | Craig Topper | 2012-03-04 | 1 | -1/+1 |
| * | Handle regmasks in MachineCSE. | Jakob Stoklund Olesen | 2012-02-28 | 1 | -0/+6 |
| * | Re-enable 150652 and 150654 - Make FPSCR non-reserved, and make MachineCSE ba... | Lang Hames | 2012-02-17 | 1 | -3/+9 |
