| Age | Commit message (Expand) | Author | Files | Lines |
| 2025-09-08 | clk: sophgo: cv18xx-ip: convert from round_rate() to determine_rate() | Brian Masney | 1 | -4/+6 |
| 2025-09-08 | clk: sophgo: sg2042-pll: remove round_rate() in favor of determine_rate() | Brian Masney | 1 | -17/+9 |
| 2025-09-08 | clk: sophgo: sg2042-clkgen: convert from round_rate() to determine_rate() | Brian Masney | 1 | -8/+9 |
| 2025-07-26 | clk: Fix typos | Bjorn Helgaas | 1 | -1/+1 |
| 2025-06-19 | clk: sophgo: Use div64* for 64-by-32 division to simplify | Pei Xiao | 1 | -2/+2 |
| 2025-05-07 | clk: sophgo: Add clock controller support for SG2044 SoC | Inochi Amaoto | 3 | -0/+1822 |
| 2025-05-07 | clk: sophgo: Add PLL clock controller support for SG2044 SoC | Inochi Amaoto | 3 | -0/+639 |
| 2025-05-07 | clk: sophgo: Add support for newly added precise compatible | Inochi Amaoto | 1 | -0/+2 |
| 2024-10-28 | clk: sophgo: avoid integer overflow in sg2042_pll_recalc_rate() | Zichen Xie | 1 | -1/+1 |
| 2024-07-18 | clk: sophgo: clk-sg2042-pll: Fix uninitialized variable in debug output | Dan Carpenter | 1 | -1/+1 |
| 2024-07-16 | Merge branches 'clk-qcom', 'clk-rockchip', 'clk-sophgo' and 'clk-thead' into ... | Stephen Boyd | 7 | -1/+2061 |
| 2024-07-10 | clk: sophgo: Avoid -Wsometimes-uninitialized in sg2042_clk_pll_set_rate() | Nathan Chancellor | 1 | -10/+7 |
| 2024-07-10 | clk/sophgo: Using BUG() instead of unreachable() in mmux_get_parent_id() | Li Qiang | 1 | -1/+1 |
| 2024-06-14 | clk: sophgo: Add SG2042 clock driver | Chen Wang | 6 | -0/+2063 |
| 2024-06-03 | clk: sophgo: add missing MODULE_DESCRIPTION() macro | Jeff Johnson | 1 | -0/+1 |
| 2024-04-19 | clk: sophgo: avoid open-coded 64-bit division | Arnd Bergmann | 1 | -2/+1 |
| 2024-04-11 | clk: sophgo: Make synthesizer struct static | Inochi Amaoto | 1 | -6/+6 |
| 2024-04-11 | clk: sophgo: Add clock support for SG2000 SoC | Inochi Amaoto | 1 | -0/+15 |
| 2024-04-11 | clk: sophgo: Add clock support for CV1810 SoC | Inochi Amaoto | 2 | -0/+196 |
| 2024-04-11 | clk: sophgo: Add clock support for CV1800 SoC | Inochi Amaoto | 10 | -0/+3300 |