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authorHang Cao <caohang@eswincomputing.com>2025-11-12 13:53:21 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2025-11-21 15:13:35 +0100
commitc640a4239db53e077dd5fd20db52fbc8b64f290b (patch)
treed20e12b0a24165662674c9796c46fb308bda0f10
parent1b474ee01fbb73b1365adbf9b3067f7375e471ee (diff)
downloadtip-c640a4239db53e077dd5fd20db52fbc8b64f290b.tar.gz
dt-bindings: usb: Add ESWIN EIC7700 USB controller
Add Device Tree binding documentation for the ESWIN EIC7700 usb controller module. Signed-off-by: Senchuan Zhang <zhangsenchuan@eswincomputing.com> Signed-off-by: Hang Cao <caohang@eswincomputing.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251112055321.1638-1-caohang@eswincomputing.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--Documentation/devicetree/bindings/usb/eswin,eic7700-usb.yaml94
1 files changed, 94 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/eswin,eic7700-usb.yaml b/Documentation/devicetree/bindings/usb/eswin,eic7700-usb.yaml
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index 00000000000000..41c3b1b9899115
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+++ b/Documentation/devicetree/bindings/usb/eswin,eic7700-usb.yaml
@@ -0,0 +1,94 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/eswin,eic7700-usb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ESWIN EIC7700 SoC Usb Controller
+
+maintainers:
+ - Wei Yang <yangwei1@eswincomputing.com>
+ - Senchuan Zhang <zhangsenchuan@eswincomputing.com>
+ - Hang Cao <caohang@eswincomputing.com>
+
+description:
+ The Usb controller on EIC7700 SoC.
+
+allOf:
+ - $ref: snps,dwc3-common.yaml#
+
+properties:
+ compatible:
+ const: eswin,eic7700-dwc3
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ items:
+ - const: peripheral
+
+ clocks:
+ maxItems: 3
+
+ clock-names:
+ items:
+ - const: aclk
+ - const: cfg
+ - const: usb_en
+
+ resets:
+ maxItems: 2
+
+ reset-names:
+ items:
+ - const: vaux
+ - const: usb_rst
+
+ eswin,hsp-sp-csr:
+ description:
+ HSP CSR is to control and get status of different high-speed peripherals
+ (such as Ethernet, USB, SATA, etc.) via register, which can tune
+ board-level's parameters of PHY, etc.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - items:
+ - description: phandle to HSP Register Controller hsp_sp_csr node.
+ - description: USB bus register offset.
+ - description: AXI low power register offset.
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+ - interrupt-names
+ - resets
+ - reset-names
+ - eswin,hsp-sp-csr
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ usb@50480000 {
+ compatible = "eswin,eic7700-dwc3";
+ reg = <0x50480000 0x10000>;
+ clocks = <&clock 135>,
+ <&clock 136>,
+ <&hspcrg 18>;
+ clock-names = "aclk", "cfg", "usb_en";
+ interrupt-parent = <&plic>;
+ interrupts = <85>;
+ interrupt-names = "peripheral";
+ resets = <&reset 84>, <&hspcrg 2>;
+ reset-names = "vaux", "usb_rst";
+ dr_mode = "peripheral";
+ maximum-speed = "high-speed";
+ phy_type = "utmi";
+ eswin,hsp-sp-csr = <&hsp_sp_csr 0x800 0x818>;
+ };