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path: root/arch/arm/mm/cache-l2x0.c
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2025-10-02ARM: 9451/1: mm: l2x0: use string choices helperKuninori Morimoto1-3/+4
2020-09-15ARM: 9007/1: l2c: fix prefetch bits init in L2X0_AUX_CTRL using DT valuesGuillaume Tucker1-4/+12
2019-08-29ARM: 8890/1: l2x0: add marvell,ecc-enable property for auroraChris Packham1-0/+5
2019-08-29ARM: 8886/1: l2x0: support parity-enable/disable on auroraChris Packham1-0/+7
2019-08-29ARM: 8887/1: aurora-l2: add prefix to MAX_RANGE_SIZEJan Luebbe1-2/+2
2019-08-29ARM: 8902/1: l2c: move cache-aurora-l2.h to asm/hardwareJan Luebbe1-1/+1
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 333Thomas Gleixner1-13/+1
2017-03-17ARM: 8659/1: l2c: allow CA9 optimizations to be disabledChris Brandt1-2/+11
2016-12-25cpu/hotplug: Cleanup state namesThomas Gleixner1-1/+1
2016-09-06ARM: 8611/1: l2x0: add PMU supportMark Rutland1-0/+6
2016-08-12ARM: 8593/1: cache-l2x0.c: Do not clear bit 23 in prefetch control registerAndrey Smirnov1-5/+2
2016-08-12ARM: 8592/1: cache-l2x0.c: Replace magic numbersAndrey Smirnov1-2/+4
2016-07-15arm/l2c: Convert to hotplug state machineRichard Cochran1-14/+13
2016-05-05ARM: 8569/1: pl2x0: Add OF control of cache power managementBrad Mouring1-5/+21
2015-12-22ARM: 8482/1: l2x0: make it possible to disable outer sync from DTLinus Walleij1-3/+10
2015-11-16ARM: 8448/1: add some L220 DT settingsLinus Walleij1-0/+20
2015-07-10ARM: 8395/1: l2c: Add support for the "arm,shared-override" propertyGeert Uytterhoeven1-0/+5
2015-06-10ARM: 8391/1: l2c: add options to overwrite prefetching behaviorHauke Mehrtens1-0/+20
2015-05-15ARM: l2c: avoid passing auxiliary control register through enable methodRussell King1-15/+17
2015-05-15ARM: l2c: only unlock caches if NS_LOCKDOWN bit is setRussell King1-1/+25
2015-05-15ARM: l2c: clean up l2c_configure()Russell King1-9/+14
2015-05-15ARM: l2c: write auxiliary control register firstRussell King1-2/+2
2015-05-15ARM: l2c: restore the behaviour documented above l2c_enable()Russell King1-5/+5
2015-04-14Merge branches 'misc', 'vdso' and 'fixes' into for-nextRussell King1-17/+16
2015-03-18ARM: 8310/1: l2c: Fix prefetch settings dt parsingFabrice Gasnier1-17/+16
2015-03-10ARM: 8309/1: l2c: enforce use of cache-level propertyFlorian Fainelli1-0/+7
2015-02-12Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds1-209/+230
2015-02-06ARM: 8297/1: cache-l2x0: optimize aurora range operationsArnd Bergmann1-46/+22
2015-02-06ARM: 8296/1: cache-l2x0: clean up aurora cache handlingArnd Bergmann1-73/+38
2015-01-20ARM: cache-l2x0.c: Make it clear that cache-l2x0 handles L310 cache controllerPavel Machek1-1/+1
2015-01-20ARM: l2c: fix commentGeert Uytterhoeven1-1/+1
2015-01-16ARM: 8262/1: l2c: Add support for overriding prefetch settingsTomasz Figa1-0/+54
2015-01-16ARM: 8260/1: l2c: Add interface to ask hypervisor to configure L2CTomasz Figa1-0/+6
2015-01-16ARM: 8259/1: l2c: Refactor the driver to use commit-like interfaceTomasz Figa1-96/+116
2015-01-16ARM: 8258/1: l2c: use l2c_write_sec() for restoring latency and filter regsMarek Szyprowski1-16/+16
2014-10-29ARM: 8183/1: l2c: Improve l2c310_of_parse() error messageFabio Estevam1-2/+2
2014-10-29ARM: 8182/1: l2c: Make l2x0_cache_size_of_parse() return 'int'Fabio Estevam1-6/+16
2014-10-02ARM: 8169/1: l2c: parse cache properties from ePAPR definitionsLinus Walleij1-0/+121
2014-08-05Merge branches 'fixes' and 'misc' into for-nextRussell King1-1/+1
2014-07-18ARM: make it easier to check the CPU part number correctlyRussell King1-1/+1
2014-07-07ARM: l2c: fix revision checkingRussell King1-1/+1
2014-06-29ARM: 8076/1: mm: add support for HW coherent systems in PL310 cacheThomas Petazzoni1-0/+31
2014-05-30ARM: l2c: trial at enabling some Cortex-A9 optimisationsRussell King1-3/+70
2014-05-30ARM: l2c: add warnings for stuff modifying aux_ctrl register valuesRussell King1-3/+22
2014-05-30ARM: l2c: print a warning with L2C-310 caches if the cache size is modifiedRussell King1-0/+2
2014-05-30ARM: l2c: remove old .set_debug methodRussell King1-19/+2
2014-05-30ARM: l2c: always enable non-secure access to lockdown registersRussell King1-2/+21
2014-05-30ARM: l2c: always enable low power modesRussell King1-0/+12
2014-05-30ARM: l2c: add automatic enable of early BRESPRussell King1-3/+22
2014-05-30ARM: l2c: move L2 cache register saving to a more sensible locationRussell King1-12/+22
2014-05-30ARM: l2c: check that DT files specify the required "cache-unified" propertyRussell King1-0/+4
2014-05-30ARM: l2c: fix register namingRussell King1-28/+29
2014-05-30ARM: l2c: implement L2C-310 erratum 752271 in core L2C codeRussell King1-1/+17
2014-05-30ARM: l2c: provide generic hook to intercept writes to secure registersRussell King1-12/+30
2014-05-30ARM: l2c: move way size calculation data into l2c_init_dataRussell King1-9/+20
2014-05-30ARM: l2c: add decode for L2C-220 cache waysRussell King1-0/+1
2014-05-30ARM: l2c: move type string into l2c_init_data structureRussell King1-7/+13
2014-05-30ARM: l2c: remove obsolete l2x0 ops for non-OF initRussell King1-206/+0
2014-05-30ARM: l2c: convert Broadcom L2C-310 to new codeRussell King1-16/+11
2014-05-30ARM: l2c: add L2C-220 specific handlersRussell King1-10/+157
2014-05-30ARM: l2c: use L2C-210 handlers for L2C-310 errata-less implementationsRussell King1-22/+36
2014-05-30ARM: l2c: implement L2C-310 erratum 588369 as a method overrideRussell King1-0/+69
2014-05-30ARM: l2c: implement L2C-310 erratum 727915 as a method overrideRussell King1-0/+20
2014-05-30ARM: l2c: add L2C-210 specific handlersRussell King1-1/+122
2014-05-30ARM: l2c: move pl310_set_debug() into l2c-310 codeRussell King1-8/+6
2014-05-30ARM: l2c: simplify l2x0 unlocking codeRussell King1-17/+8
2014-05-30ARM: l2c: clean up save/resume functionsRussell King1-57/+52
2014-05-30ARM: l2c: move and add ARM L2C-2x0/L2C-310 save/resume code to non-OFRussell King1-74/+77
2014-05-30ARM: l2c: clean up L2 cache initialisation messagesRussell King1-3/+4
2014-05-30ARM: l2c: implement fixups for L2 cache controller quirks/errataRussell King1-11/+101
2014-05-30ARM: l2c: move aurora broadcast setup to enable functionRussell King1-13/+15
2014-05-30ARM: l2c: only write the auxiliary control register if requiredRussell King1-1/+3
2014-05-30ARM: l2c: write auxctrl register before unlockingRussell King1-5/+5
2014-05-30ARM: l2c: provide enable methodRussell King1-18/+62
2014-05-30ARM: l2c: group implementation specific code togetherRussell King1-251/+251
2014-05-30ARM: l2c: move l2c save function to __l2c_init()Russell King1-3/+7
2014-05-30ARM: l2c: pass iomem address into data->save functionRussell King1-16/+16
2014-05-30ARM: l2c: clean up OF initialisation a bitRussell King1-26/+40
2014-05-30ARM: l2c: add and use L2C revision constantsRussell King1-5/+5
2014-05-30ARM: l2c: rename cache_wait_way()Russell King1-3/+3
2014-05-30ARM: l2c: provide generic helper for way-based operationsRussell King1-6/+9
2014-05-30ARM: l2c: split out cache unlock codeRussell King1-7/+16
2014-05-30ARM: l2c: provide generic function for calling set_debug methodRussell King1-1/+11
2014-05-30ARM: l2c: rename OF specific things, making l2x0_of_data available to allRussell King1-32/+32
2014-05-30ARM: l2c: tidy up l2x0_of_data declarationsRussell King1-16/+14
2014-05-30ARM: l2c: add helper for L2 cache controller DT IDsRussell King1-13/+10
2014-05-22ARM: l2c: remove outer_inv_all() methodRussell King1-5/+0
2013-12-29ARM: 7922/1: l2x0: add Marvell Tauros3 supportSebastian Hesselbarth1-8/+40
2013-09-05Merge branches 'debug-choice', 'devel-stable' and 'misc' into for-linusRussell King1-5/+7
2013-08-20ARM: 7821/1: DT: binding fixup to align with vendor-prefixes.txtChristian Daudt1-1/+3
2013-08-20ARM: 7820/1: mm: cache-l2x0: Print the cache size in kBFabio Estevam1-3/+3
2013-08-12ARM: l2x0: use -st dsb option for ordering writel_relaxed with unlockWill Deacon1-1/+1
2013-05-15ARM: 7716/1: bcm281xx: Add L2 support for Rev A2 chipsChristian Daudt1-0/+158
2013-04-03ARM: 7682/1: cache-l2x0: fix masking of RTL revision numbering and set_debug ...Rob Herring1-7/+4
2013-01-07ARM: 7616/1: cache-l2x0: aurora: Use writel_relaxed instead of writelGregory CLEMENT1-4/+5
2013-01-07ARM: 7615/1: cache-l2x0: aurora: Invalidate during clean operation with WT en...Gregory CLEMENT1-8/+14
2013-01-02ARM: 7608/1: l2x0: Only set .set_debug on PL310 r3p0 and earlierRob Herring1-1/+2
2012-11-06ARM: 7547/4: cache-l2x0: add support for Aurora L2 cache ctrlGregory CLEMENT1-13/+210
2012-10-18ARM: 7545/1: cache-l2x0: make outer_cache_fns a field of l2x0_of_dataGregory CLEMENT1-15/+40
2012-10-07Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds1-2/+6
2012-09-15ARM: 7507/1: cache-l2x0.c: save the final aux ctrl value for resumingYilu Mao1-2/+6
2012-09-11ARM: cache-l2x0: add a const qualifierUwe Kleine-König1-1/+1
2012-04-23ARM: 7398/1: l2x0: only write to debug registers on PL310Will Deacon1-5/+8
2012-04-23ARM: 7397/1: l2x0: only apply workaround for erratum #753970 on PL310Will Deacon1-6/+6
2012-01-20ARM: cache-l2x0.c: consistently use u32Russell King1-11/+11
2011-11-21ARM: 7162/1: errata: tidy up Kconfig options for PL310 errata workaroundsWill Deacon1-1/+1
2011-10-26Merge branch 'core-locking-for-linus' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds1-23/+23
2011-10-17ARM: 7114/1: cache-l2x0: add resume entry for l2 in secure modeBarry Song1-10/+119
2011-10-17ARM: 7090/1: CACHE-L2X0: filter start address can be 0 and is often 0Barry Song1-1/+1
2011-10-17ARM: 7089/1: L2X0: add explicit cpu_relax() for busy wait loopBarry Song1-1/+1
2011-10-17ARM: 7009/1: l2x0: Add OF based initializationRob Herring1-0/+103
2011-09-13locking, ARM: Annotate low level hw locks as rawThomas Gleixner1-23/+23
2011-09-07ARM: 7080/1: l2x0: make sure I&D are not locked down on initLinus Walleij1-0/+21
2011-07-06ARM: 6987/1: l2x0: fix disabling function to avoid deadlockWill Deacon1-6/+13
2011-03-16Merge branch 'misc' into develRussell King1-14/+18
2011-03-09ARM: 6795/1: l2x0: Errata fix for flush by Way operation can cause data corruptiSantosh Shilimkar1-14/+18
2011-02-19ARM: 6741/1: errata: pl310 cache sync operation may be faultySrinidhi Kasagar1-0/+6
2010-10-26ARM: l2x0: Optimise the range based operationsSantosh Shilimkar1-0/+22
2010-10-26ARM: l2x0: Determine the cache sizeSantosh Shilimkar1-2/+11
2010-10-26arm: Implement l2x0 cache disable functionsThomas Gleixner1-1/+27
2010-10-26ARM: Improve the L2 cache performance when PL310 is usedCatalin Marinas1-3/+12
2010-07-29ARM: 6272/1: Convert L2x0 to use the IO relaxed operationsCatalin Marinas1-13/+13
2010-07-09ARM: 6210/1: Do not rely on reset defaults of L2X0_AUX_CTRLSascha Hauer1-2/+3
2010-05-17Merge branch 'devel-stable' into develRussell King1-0/+10
2010-05-15ARM: 6094/1: Extend cache-l2x0 to support the 16-way PL310Jason McMullan1-5/+34
2010-03-25ARM: 5995/1: ARM: Add L2x0 outer_sync() support (3/4)Catalin Marinas1-0/+10
2010-02-15ARM: 5919/1: ARM: L2 : Errata 588369: Clean & Invalidate do not invalidate cl...Santosh Shilimkar1-0/+36
2010-02-15ARM: 5916/1: ARM: L2 : Add maintainace by line helper functionsSantosh Shilimkar1-10/+26
2009-12-14Merge branch 'pending-l2x0' into cacheRussell King1-21/+72
2009-12-14ARM: cache-l2x0: make better use of background cache handlingRussell King1-11/+23
2009-12-14ARM: cache-l2x0: avoid taking spinlock for every iterationRussell King1-13/+52
2009-12-03ARM: 5845/1: l2x0: check whether l2x0 already enabledSrinidhi Kasagar1-9/+16
2008-09-06[ARM] Convert asm/io.h to linux/io.hRussell King1-1/+1
2007-09-17[ARM] 4568/1: fix l2x0 cache invalidate handling of unaligned addressesRui Sousa1-1/+11
2007-07-20[ARM] 4500/1: Add locking around the background L2x0 cache operationsCatalin Marinas1-0/+6
2007-02-11[ARM] 4135/1: Add support for the L210/L220 cache controllersCatalin Marinas1-0/+104
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