| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2025-11-14 | irqchip/riscv-intc: Add missing free() callback in riscv_intc_domain_opsirq-urgent-2025-11-15 | Nick Hu | 1 | -1/+2 |
| 2025-05-16 | irqchip: Switch to of_fwnode_handle() | Jiri Slaby (SUSE) | 1 | -1/+1 |
| 2024-10-15 | irqchip/riscv-intc: Fix SMP=n boot with ACPI | Sunil V L | 1 | -1/+18 |
| 2024-08-27 | irqchip/riscv-intc: Add ACPI support for AIA | Sunil V L | 1 | -0/+90 |
| 2024-07-22 | Merge tag 'irq-core-2024-07-15' of git://git.kernel.org/pub/scm/linux/kernel/... | Linus Torvalds | 1 | -2/+2 |
| 2024-06-21 | irqchip/riscv-intc: Remove asmlinkage | Jisheng Zhang | 1 | -2/+2 |
| 2024-06-03 | irqchip/riscv-intc: Prevent memory leak when riscv_intc_init_common() fails | Sunil V L | 1 | -2/+7 |
| 2024-03-15 | irqchip/riscv-intc: Fix use of AIA interrupts 32-63 on riscv32irq-urgent-2024-03-17 | Samuel Holland | 1 | -5/+8 |
| 2024-02-27 | irqchip/riscv-intc: Fix low-level interrupt handler setup for AIAirq-msi-2024-03-10 | Anup Patel | 1 | -3/+7 |
| 2024-02-23 | irqchip/riscv-intc: Add support for RISC-V AIA | Anup Patel | 1 | -9/+23 |
| 2024-02-23 | irqchip/riscv-intc: Introduce Andes hart-level interrupt controllerirq-for-riscv-02-23-24 | Yu Chien Peter Lin | 1 | -7/+51 |
| 2024-02-23 | irqchip/riscv-intc: Allow large non-standard interrupt number | Yu Chien Peter Lin | 1 | -7/+19 |
| 2023-10-07 | irqchip/riscv-intc: Mark all INTC nodes as initialized | Anup Patel | 1 | -1/+9 |
| 2023-06-01 | irqchip/riscv-intc: Add ACPI support | Sunil V L | 1 | -15/+55 |
| 2023-04-08 | irqchip/riscv-intc: Add empty irq_eoi() for chained irq handlers | Anup Patel | 1 | -0/+17 |
| 2023-04-08 | RISC-V: Treat IPIs as normal Linux IRQs | Anup Patel | 1 | -31/+24 |
| 2023-04-08 | irqchip/riscv-intc: Allow drivers to directly discover INTC hwnode | Anup Patel | 1 | -0/+7 |
| 2022-07-19 | riscv: cpu: Add 64bit hartid support on RV64 | Sunil V L | 1 | -3/+4 |
| 2021-10-26 | irq: remove handle_domain_{irq,nmi}() | Mark Rutland | 1 | -1/+1 |
| 2020-06-21 | irqchip/riscv-intc: Fix a typo in a pr_warn() | Palmer Dabbelt | 1 | -1/+1 |
| 2020-06-09 | clocksource/drivers/timer-riscv: Use per-CPU timer interrupt | Anup Patel | 1 | -8/+0 |
| 2020-06-09 | irqchip: RISC-V per-HART local interrupt controller driver | Anup Patel | 1 | -0/+146 |
