| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2025-11-19 | raid6: riscv: Allow code to be compiled in userspace | Chunyan Zhang | 1 | -145/+152 |
| 2025-11-19 | raid6: riscv: Prevent compiler from breaking inline vector assembly code | Chunyan Zhang | 1 | -0/+4 |
| 2025-09-16 | raid6: riscv: replace one load with a move to speed up the caculation | Chunyan Zhang | 1 | -30/+30 |
| 2025-09-16 | raid6: riscv: Clean up unused header file inclusion | Chunyan Zhang | 1 | -3/+0 |
| 2025-06-12 | raid6: riscv: Fix NULL pointer dereference caused by a missing clobber | Chunyan Zhang | 1 | -20/+28 |
| 2025-06-05 | raid6: Add RISC-V SIMD syndrome and recovery calculations | Chunyan Zhang | 1 | -0/+1212 |
