How to write a part select expression using shift operator in system Verilog?
Given a memory word
logic [0:8] memword;
How to write the part select expression memword[i:j] in shift operator? If not shift operator, can you please suggest other expressions?
i and j can be any indexing expression. We will assign this memory word to another memory word with |i-j| width.
Consider both left to right and right to left indexing.
use case: writing an alternative statement for the part select for compiler related optimization
The memory could be used anywhere in the program
always @(posedge clk) begin
if (memword[i:j]) begin
mem2 = memword[i:j];
end
end
The main usage is to eliminate part select.